Digital electrical signals, such as CMOS level signals, are well known in the art. Typically, in digital circuit applications, the signal ranges from zero volts (representing one state) to five volts (representing another state). Low voltage CMOS level signals range from zero volts to approximately 3.3 volts. CMOS level signals have found wide usage because CMOS circuit components have low power dissipation. However, CMOS level signals have been limited in the speed of their transmission.
In certain applications, TTL electrical signals, another well known standard, have been used. However, TTL signals have a limitation of operation of up to approximately 80 to 100 mHz. In addition, TTL signals, if they are not shielded, present Electro Magnetic Interference (EMI) problems.
Recently, another standard for an electrical signal called Gunning Transceiver Logical (GTL) has been proposed. In a GTL signal, the signal swings between 0.4 volts and 1.2 volts with a reference voltage centered about 0.8 volts. Thus, a GTL signal is a low voltage swing logic signal, i.e., a deviation of at most about 0.4 volts from the central or reference voltage of 0.8 volts is required to drive the state of the logic, which the GTL signal represents. At the receiver, a circuit that can detect a swing of approximate 50 mv in one direction can be used to convert the GTL signal into a CMOS level signal. The advantage of the GTL signal is that it is low power dissipation and can operate at a very fast frequency because its resistive termination provides a clean signalling environment while the low terminating voltage of 1.2 volts results in reduced voltage drops across the said resistive elements. Furthermore, since the swing is low, EMI can be contained.
In the prior art, the conversion of a GTL signal into a CMOS level signal has been accomplished by the use of a differential sense amplifier, which is well known in the art. See, for example, U.S. Pat. No. 5,228,106. A differential sense amplifier, however, is a linear circuit and it consumes static current. At the input stage of conversion of a GTL signal to a CMOS level signal, it is estimated that approximately 1.5 to 2.0 milliamps of current is consumed.
One prior art solution to the problem of current consumption is to decrease the current to the differential sense amplifier. However, this affects the gain or the bandwidth and it reduces the speed of the converter. Further, the incoming signal is often times latched/registered immediately after conversion, incurring register set up time and clock to Q delays. A fully integrated solution consolidates these delays and minimizes them overall.